View DS1705_104521.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

DSDS1705/DS1706
DS1705/DS1706 3.3 and 5.0 Volt MicroMonitor
FEATURES
PIN ASSIGNMENT
PBRST 1 2 3 4 8 7 6 5 WDS RST ST NMI
* Halts and restarts an out-of-control microprocessor * Holds
sients microprocessor in check during power tranrestarts microprocessor after power
VCC GND IN
* Automatically
failure
* Monitors pushbutton for external override * Accurate 5%, 10% or 20% resets for 3.3 systems and
5% or 10% resets for 5.0 volt systems
PBRST VCC GND IN
8-PIN DIP (300 MIL) 1 2 3 4 8 7 6 5 WDS RST (*RST) ST NMI
* Eliminates the need for discrete components * 3.3 volt 20% tolerance for use with 3.0 volt systems * Pin compatible with the MAXIM MAX705/MAX706 in
8-pin DIP and 8-pin SOIC
8-PIN SOIC (150 MIL) PBRST VCC GND IN 1 2 3 4 8 7 6 5 WDS RST (*RST) ST NMI
* 8-pin DIP, 8-pin SOIC and 8-pin -SOP packages * Industrial temperature range -40C to +85C
8-PIN -SOP (118 MIL) See Mech. Drawings Section
DS1705 and DS1706_/R/S/T (*DS1706L and DS1706P)
PIN DESCRIPTION
PBRST VCC GND IN NMI ST RST *RST WDS - - - - - - - - Pushbutton Reset Input Power Supply Ground Input Non-maskable Interrupt Strobe Input Active Low Reset Output Active High Reset Output (DS1706P and DS1706L only) - Watchdog Status Output
DESCRIPTION
The DS1705/DS1706 3.3 or 5.0 Volt MicroMonitor monitors three vital conditions for a microprocessor: power supply, software execution, and external override. A precision temperature compensated reference and comparator circuit monitors the status of VCC at the device and at an upstream point for maximum protection. When the sense input detects an out-of-tolerance condition a non-maskable interrupt is generated. As the voltage at the device degrades an internal power fail signal is generated which forces the reset to an active state. When VCC returns to an in-tolerance condition, the reset signal is kept in the active state for a minimum of 130 ms to allow the power supply and processor to stabilize.
ECopyright 1995 by Dallas Semiconductor Corporation. All Rights Reserved. For important information regarding patents and other intellectual property rights, please refer to Dallas Semiconductor data books.
011296 1/10
DS1705/DS1706
The second function the DS1705/DS1706 performs is pushbutton reset control. The DS1705/DS1706 debounces the pushbutton input and guarantees an active reset pulse width of 130 ms minimum. The third function is a watchdog timer. The DS1705/DS1706 has an internal timer that forces the WDO signal to the active state if the strobe input is not driven low prior to time-out.
DS1705/DS1706 requires that the voltage at the IN pin be limited to VCC. Therefore, the maximum allowable voltage at the supply being monitored (VMAX) can also be derived as shown in Figure 5. A simple approach to solving the equation is to select a value for R2 high enough to keep power consumption low, and solve for R1. The flexibility of the IN input pin allows for detection of power loss at the earliest point in a power supply system, maximizing the amount of time for system shut- down between NMI and RST (or RST). When the supply being monitored decays to the voltage sense point, the DS1705/DS1706 pulses the NMI output to the active state for a minimum 200 s. The NMI power fail detection circuitry also has built-in hysteresis of 100 V. The supply must be below the voltage sense point for approximately 5 s before a low NMI will be generated. In this way, power supply noise is removed from the monitoring function, preventing false interrupts. During a power-up, any detected IN pin levels below VTP by the comparator are disabled from generating an interrupt until VCC rises to VCCTP. As a result, any potential NMI pulse will not be initiated until VCC reaches VCCTP. Connecting NMI to PBRST would allow non-maskable interrupt to generate an automatic reset when an out- of-tolerance condition occurred in a monitored supply. An example is shown in Figure 3.
OPERATION Power Monitor
The DS1705/DS1706 detects out-of-tolerance power supply conditions and warns a processor-based system of impending power failure. When VCC falls below the minimum VCC tolerance, a comparator outputs the RST (or RST) signal. RST (or RST) is an excellent control signal for a microprocessor, as processing is stopped at the last possible moment of valid VCC. On power-up, RST (or RST) are kept active for a minimum of 130 ms to allow the power supply and processor to stabilize.
Pushbutton Reset
The DS1705/DS1706 provides an input pin for direct connection to a push-button reset (see Figure 2). The pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such that a RST (or RST) signal of at least 130 ms minimum will be generated. The 130 ms delay commences as the pushbutton reset input is released from the low level. The push-button can be initiated by connecting the WDS or NMI outputs to the PBRST input as shown in Figure 3.
Watchdog Timer
The watchdog timer function forces WDS signals active when the ST input is not clocked within the 1 second time out period. Timeout of the watchdog starts when RST (or RST) becomes inactive. If a high-to-low transition occurs on the ST input pin prior to time-out, the watchdog timer is reset and begins to time-out again. If the watchdog timer is allowed to time out, the WDS signal is driven active (low) for a minimum of 130 ms. The ST input can be derived from many microprocessor outputs. The typical signals used are the microprocessors address signals, data signals, or control signals. When the microprocessor functions normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to time-out. To guarantee that the watchdog timer does not time-out, a high-to-low transition must occur at or less than the minimum watchdog time-out of 1 second. A typical circuit example is shown in Figure 6.
Non-Maskable Interrupt
The DS1705/DS1706 generates a non-maskable interrupt (NMI) for early warning of a power failure. A precision comparator monitors the voltage level at the IN pin relative to an on-chip reference generated by an internal band gap. The IN pin is a high impedance input allowing for a user-defined sense point. An external resistor voltage divider network (Figure 5) is used to interface with high voltage signals. This sense point may be derived from a regulated supply or from a higher DC voltage level closer to the main system power input. Since the IN trip point VTP is 1.25 volts, the proper values for R1 and R2 can be determined by the equation as shown in Figure 5. Proper operation of the
011296 2/10
DS1705/DS1706
MICROMONITOR BLOCK DIAGRAM Figure 1
IN
- +
T.C. REFERENCE DIGITAL SAMPLER NMI
- +
DIGITAL SAMPLER DIGITAL DELAY RST DS1706_/A/R/S/T
VCC
PBRST
LEVEL SENSE AND DEBOUNCE WATCHDOG STATUS LATCH
RST DS1706L/DS1706P
ST
WDS
PUSH-BUTTON RESET Figure 2
PBRST VCC DS1706P GND ST ALE NMI 8051 P RST
WDS RST
IN
PUSH-BUTTON RESET CONTROLLED BY NMI AND WDS Figure 3
PBRST VCC DS1706 GND IN ST ALE NMI WDS RST P
UPSTREAM SUPPLY VOLTAGE
RST
011296 3/10
DS1705/DS1706
TIMING DIAGRAM: PUSHBUTTON RESET Figure 4
tPDLY PBRST tPB VIH VIL tRST
RST VOH RST VOL
NON-MASKABLE INTERRUPT CIRCUIT EXAMPLE Figure 5
PBRST VSENSE VCC DS1706 GND R1 IN NMI ST TO P WDS RST
R2
V SENSE + R1 ) R2 x 1.25 R2
V MAX +
V SENSE x V CC V TP
Example:
VSENSE = 4.50 volts at the trip point VCC = 3.3 volts 10K = R2 4.50 x 3.3 + 12.4 volts maximum 1.25 4.5 + R1 ) 10K x 1.25 10K R1 + 26KW
Therefore:
011296 4/10
DS1705/DS1706
WATCHDOG TIMER Figure 6
PBRST VCC DS1706 GND IN
WDS RST ST
Z80 P RST
MREQ
DECODER NMI ADDRESS BUS
TIMING DIAGRAM: STROBE INPUT Figure 7
INVALID STROBE ST MIN. tTD WDS RESET INITIATED BY PUSHBUTTON VALID STROBE INDETERMINATE STROBE
MAX.
RST
TIMING DIAGRAM: NON-MASKABLE INTERRUPT Figure 8
VIN > 1.25V VTP(MAX) VTP VTP(MIN) VTP(MIN) VTP(MAX) VTP
tIPD NMI
tIPD
VOH
VOL
011296 5/10
DS1705/DS1706
TIMING DIAGRAM: POWER DOWN Figure 9
tF VCC VCCTP(MAX) VCCTP VCCTP(MIN)
tRPD RST (DS1705 AND DS1706_/R/S/T)
VOH
RST SLEWS WITH VCC
RST (DS1706L AND DS1706P ONLY) WDS
VOL
WDS SLEWS WITH VCC
011296 6/10
DS1705/DS1706
TIMING DIAGRAM: POWER UP Figure 10
VCCTP(MAX) VCCTP VCCTP(MIN)
VCC tRPU RST VOH RST (DS1705 AND DS1706_/R/S/T)
RST
VOL
RST (DS1706L AND DS1706P ONLY)
WDS
011296 7/10
DS1705/DS1706
ABSOLUTE MAXIMUM RATINGS*
Voltage on VCC Pin Relative to Ground Voltage on I/O Relative to Ground Operating Temperature Storage Temperature Soldering Temperature -0.5V to +7.0V -0.5V to VCC + 0.5V -40C to +85C -55C to +125C 260C for 10 seconds
* This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Supply Voltage ST and PBRST Input High Level ST and PBRST Input Low Level SYMBOL VCC VIH VIL MIN 1.0 2.0 VCC-0.5 -0.03 TYP MAX 5.5 VCC+0.3 +0.5
(-40C to +85C)
UNITS V V V NOTES 1 1, 3 1, 4 1
DC ELECTRICAL CHARACTERISTICS
PARAMETER VCC Trip Point DS1705/DS1706L VCC Trip Point DS1706 VCC Trip Point DS1706T VCC Trip Point DS1706S VCC Trip Point DS1706P or R Input Leakage Output Current @ 2.4 volts Output Current @ 0.4 volts Output Voltage @ -500 A Operating Current @ VCC < 5.5 volts Operating Current @ VCC < 3.6 volts IN Input Trip Point SYMBOL VCCTP VCCTP VCCTP VCCTP VCCTP IIL IOH IOL VOH ICC ICC VTP 1.20 1.25 10 VCC+-0.3 MIN 4.50 4.25 3.00 2.85 2.55 -1.0 350 TYP 4.65 4.40 3.08 2.93 2.63
(-40C to +85C; VCC=1.2V to 5.5V)
MAX 4.75 4.50 3.15 3.00 2.70 +1.0 UNITS V V V V V A A mA VCC-0.1 60 50 1.30 V A A V NOTES 1 1 1 1 1 2 3 3 3 5 5 1
CAPACITANCE
PARAMETER Input Capacitance Output Capacitance SYMBOL CIN COUT MIN TYP MAX 5 7 UNITS pF pF
(tA=25C)
NOTES
011296 8/10
DS1705/DS1706
AC ELECTRICAL CHARACTERISTICS
PARAMETER PBRST = VIL Reset Active Time ST Pulse Width VCC Detect to RST and RST VCC Slew Rate VCC Detect to RST and RST VCC Slew Rate PBRST Stable Low to RST and RST Watchdog Timeout VIN Detect to NMI SYMBOL tPB tRST tST tRPD tF tRPU tR tPDLY tTD tIPD 1.0 1.6 5 20 130 0 205 MIN 150 130 10 5 205 TYP
(-40C to +85C; VCC=1.2V to 5.5V)
MAX UNITS ns 285 ms ns 8 s s 285 ms ns 250 2.2 8 ns s s 8 9 7 6 9 NOTES
NOTES:
1. All voltages are referenced to ground. 2. PBRST is internally pulled up to VCC with an internal impedance of 40K typical and the ST input is internally pulled up to VCC with an internal impedance of 180K typical. 3. VCC 2.4 volts 4. VCC < 2.4 volts 5. Measured with outputs open and all inputs at VCC or ground. 6. Must not exceed tTD minimum. 7. tR = 5 s 8. Minimum watchdog timeout tested at 2.7 volts for the 3.3 volt devices and 4.5 volts for the 5.0 volt devices. 9. Noise immunity - pulses < 2 s at VCCTP minimum will not cause a reset.
011296 9/10
DS1705/DS1706
PART MARKING CODES
8765 ABCD WWY
1234 8-PIN -SOP (118 MIL)
A, B, C and D represents the device type and tolerance. ABCD 705_ 706_ 706L 706P 706R 706S 706T
- - - - - - -
DS1705 DS1706 DS1706L DS1706P DS1706R DS1706S DS1706T
WWY represents the device manufacturing Work Week, Year.
011296 10/10

▲Up To Search▲

Price & Availability of DS1705

	To Download DS1705 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .